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[Japan Soc. Applied Phys 2003 Symposium on VLSI Technology. Digest of Technical Papers - Kyoto, Japan (10-12 June 2003)] 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407) - High performance 35 nm gate CMOSFETs with vertical scaling and total stress control for 65 nm technology

✍ Scribed by Goto, K.; Tagawa, Y.; Ohta, H.; Morioka, H.; Pidin, S.; Momiyama, Y.; Okabe, K.; Kokura, H.; Inagaki, S.; Kikuchi, Y.; Kase, M.; Hashimoto, K.; Kojima, M.; Sugii, T.

Book ID: 126769510
Publisher: Japan Soc. Applied Phys
Year: 2003
Weight: 185 KB
Category: Article
ISBN-13: 9784891140335
DOI: 10.1109/VLSIT.2003.1221080

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