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[Japan Soc. Applied Phys 2003 Symposium on VLSI Technology. Digest of Technical Papers - Kyoto, Japan (10-12 June 2003)] 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407) - ArF lithography technologies for 65 nm-node CMOS (CMOS5) with 30 nm logic gate and high density embedded memories

✍ Scribed by Hashimoto, K.; Uesawa, F.; Takahata, K.; Kikuchi, K.; Kanai, H.; Shimizu, H.; Shiobara, E.; Takeuchi, K.; Endo, A.; Harakawa, H.; Mimotogi, S.

Book ID: 126652704
Publisher: Japan Soc. Applied Phys
Year: 2003
Weight: 196 KB
Category: Article
ISBN-13: 9784891140335
DOI: 10.1109/VLSIT.2003.1221078

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