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[Japan Soc. Applied Phys 2003 Symposium on VLSI Technology. Digest of Technical Papers - Kyoto, Japan (10-12 June 2003)] 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407) - Tri-Gate fully-depleted CMOS transistors: fabrication, design and layout

✍ Scribed by Doyle, B.; Boyanov, B.; Datta, S.; Doczy, M.; Hareland, S.; Jin, B.; Kavalieros, J.; Linton, T.; Rios, R.; Chau, R.

Book ID: 125804666
Publisher: Japan Soc. Applied Phys
Year: 2003
Tongue: Japanese
Weight: 211 KB
Category: Article
ISBN-13: 9784891140335
DOI: 10.1109/VLSIT.2003.1221121

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