✦ LIBER ✦

Complete test-set generation for bridging faults in combinational-logic circuits

✍ Scribed by Sanjoy Kumar Basu; Jogesh Chandra Paul; Pramode Ranjan Bhattacharjee

Book ID: 107766481
Publisher: Elsevier Science
Year: 1986
Tongue: English
Weight: 588 KB
Volume: 38
Category: Article
ISSN: 0020-0255
DOI: 10.1016/0020-0255(86)90025-3

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

An algorithm to generate complete test s

An algorithm to generate complete test sets for stuck-at faults in combinational logic circuits

✍ Leonard J. Tung; David V. Kerns 📂 Article 📅 1988 🏛 Elsevier Science 🌐 English ⚖ 581 KB

A new algorithm to generate test sets for stuck-at faults in combinational logic circuits via fault simulation is presented. The algorithm is non-path-sensitizing, non-pathtracing and can be easily implemented on a computer. The stuck-at fault model in the algorithm is developed using the component

Stuck-open faults test generation for cm

Stuck-open faults test generation for cmos combinational circuits

✍ Seiji Kajihara; Noriyoshi Itazaki; Kozo Kinoshita 📂 Article 📅 1991 🏛 John Wiley and Sons 🌐 English ⚖ 716 KB

Modeling for bridging faults in nMOS com

Modeling for bridging faults in nMOS combinational circuits

✍ Asad A. Ismaeel; Rakesh Bhatnagar; Mohammed Khan 📂 Article 📅 1997 🏛 Elsevier Science 🌐 English ⚖ 775 KB

Test generation for combinational logic

Test generation for combinational logic circuits using information theory

✍ P.D. Stigall; Y.M. Erten 📂 Article 📅 1986 🏛 Elsevier Science 🌐 English ⚖ 582 KB

A complete critical path algorithm for t

A complete critical path algorithm for test generation of combinational circuits

✍ Quan Zhou; Daozheng Wei 📂 Article 📅 1991 🏛 Springer 🌐 English ⚖ 490 KB

A generalized fault simulator for combin

A generalized fault simulator for combinational logic circuits

✍ Rajesh Raina; T.N. Rajashekhara 📂 Article 📅 1989 🏛 Elsevier Science 🌐 English ⚖ 409 KB