✦ LIBER ✦

Accumulation gate capacitance of MOS devices with ultrathin high-κ gate dielectrics: modeling and characterization

✍ Scribed by Islam, A.E.; Haque, A.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Characterization of accumulation layer c

✍ Kar, S.; Rawat, S.; Rakheja, S.; Reddy, D. 📂 Article 📅 2005 🏛 IEEE 🌐 English ⚖ 557 KB

Modeling study of ultrathin gate oxides

✍ Yang, N.; Henson, W.K.; Hauser, J.R.; Wortman, J.J. 📂 Article 📅 1999 🏛 IEEE 🌐 English ⚖ 168 KB

A Program for Device Model Parameter Ext

✍ Fei Li; Register, L.F.; Hasan, M.M.; Banerjee, S.K. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 647 KB

Electrical and Interfacial Characterizat

✍ Dalapati, G.K.; Yi Tong; Wei-Yip Loh; Hoe Keat Mun; Byung Jin Cho 📂 Article 📅 2007 🏛 IEEE 🌐 English ⚖ 271 KB

Physically based quantum-mechanical comp

✍ Fei Li; Mudanai, S.P.; Yang-Yu Fan; Register, L.F.; Banerjee, S.K. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 429 KB

Gate capacitances behavior of nanometer

✍ Yu-Sheng Lin; Chia-Hong Lin; Kuo, J.B.; Ke-Wei Su 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 731 KB