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Gate capacitances behavior of nanometer FD SOI CMOS devices with HfO2 high-k gate dielectric considering vertical and fringing displacement effects using 2-D Simulation

✍ Scribed by Yu-Sheng Lin; Chia-Hong Lin; Kuo, J.B.; Ke-Wei Su


Book ID
114618274
Publisher
IEEE
Year
2006
Tongue
English
Weight
731 KB
Volume
53
Category
Article
ISSN
0018-9383

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