๐”– Bobbio Scriptorium
โœฆ   LIBER   โœฆ

A neural network algorithm for testing stuck-open faults in CMOS combinational circuits

โœ Scribed by Zaifu Zhang; Robert D. Mcleod; Witold Pedrycz


Publisher
Springer US
Year
1993
Tongue
English
Weight
831 KB
Volume
4
Category
Article
ISSN
0923-8174

No coin nor oath required. For personal study only.


๐Ÿ“œ SIMILAR VOLUMES


Modeling and testing for stuck faults in
โœ Asad A. Ismaeel; Rakesh Bhatnagar ๐Ÿ“‚ Article ๐Ÿ“… 1997 ๐Ÿ› Elsevier Science ๐ŸŒ English โš– 968 KB

A transistor level model and a testing methodology are presented for BiCMOS circuits. The model fully describes the functional (logical) grad parametric behavior of the 13iCMOS circuits in the presence of transistor stuck faults. Tile model employs the logic transistor function (LTF). The LTF descri

An algorithm to generate complete test s
โœ Leonard J. Tung; David V. Kerns ๐Ÿ“‚ Article ๐Ÿ“… 1988 ๐Ÿ› Elsevier Science ๐ŸŒ English โš– 581 KB

A new algorithm to generate test sets for stuck-at faults in combinational logic circuits via fault simulation is presented. The algorithm is non-path-sensitizing, non-pathtracing and can be easily implemented on a computer. The stuck-at fault model in the algorithm is developed using the component