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Modeling for stuck faults in cmos non-threshold logic (NTL) combinational circuits

✍ Scribed by Asad A. Ismaeel; Rakesh Bhatnagar

Publisher: Elsevier Science
Year: 1995
Tongue: English
Weight: 530 KB
Volume: 35
Category: Article
ISSN: 0026-2714
DOI: 10.1016/0026-2714(95)93178-d

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