✦ LIBER ✦

Structural design optimization for board-level drop reliability of wafer-level chip-scale packages

✍ Scribed by Tsung-Yueh Tsai; Yi-Shao Lai; Chang-Lin Yeh; Rong-Sheng Chen

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Optimal design towards enhancement of bo

✍ Yi-Shao Lai; Tong Hong Wang 📂 Article 📅 2007 🏛 Elsevier Science 🌐 English ⚖ 434 KB

Board level reliability assessment of ch

✍ Z.P Wang; Y.M Tan; K.M Chua 📂 Article 📅 1999 🏛 Elsevier Science 🌐 English ⚖ 600 KB

Reliability evaluations for board-level

✍ Tong Hong Wang; Yi-Shao Lai; Yu-Cheng Lin 📂 Article 📅 2008 🏛 Elsevier Science 🌐 English ⚖ 870 KB

Optimization of board-level thermomechan

✍ Tong Hong Wang; Ching-Chun Wang; Yi-Shao Lai; Kuo-Chin Chang; Chien-Hsun Lee 📂 Article 📅 2008 🏛 Elsevier Science 🌐 English ⚖ 559 KB

Optimization of Thermomechanical Reliabi

✍ Tong Hong Wang; Yi-Shao Lai 📂 Article 📅 2008 🏛 IEEE 🌐 English ⚖ 1018 KB

Solder joint crack propagation analysis

✍ Lau, J.H.; Chang, C.; Lee, S.-W.R. 📂 Article 📅 2001 🏛 IEEE 🌐 English ⚖ 551 KB