Multiple stuck-at faults detection in CMOS combinational gates
β Scribed by G. Buonanno; F. Lombardi; D. Sciuto; Y.-N. Sken
- Publisher
- Elsevier Science
- Year
- 1991
- Weight
- 846 KB
- Volume
- 32
- Category
- Article
- ISSN
- 0165-6074
No coin nor oath required. For personal study only.
π SIMILAR VOLUMES
Two faults are said to be equivalent, with respect to a test set T, iff they cannot be distinguished by any test in T. The sizes of the corresponding equivalence classes of faults are used as a basis for comparing the diagnostic capability of two given test sets. A novel algorithm, called "multiway
## Abstract A new method is proposed to diagnose single stuckβat faults in combinational circuits. In this method, based on the operations of the nonfaulty circuit, first the possible faulty paths are examined from the primary outputs, at which errors have been observed, toward the primary inputs t
A new algorithm to generate test sets for stuck-at faults in combinational logic circuits via fault simulation is presented. The algorithm is non-path-sensitizing, non-pathtracing and can be easily implemented on a computer. The stuck-at fault model in the algorithm is developed using the component