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[IEEE 24th IEEE VLSI Test Symposium - Berkeley, CA, USA (30-04 April 2006)] 24th IEEE VLSI Test Symposium - A Scheme for On-Chip Timing Characterization

✍ Scribed by Datta, R.; Carpenter, G.; Nowka, K.; Abraham, J.A.

No coin nor oath required. For personal study only.

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