## Abstract A three‐stage low‐noise amplifier (LNA) fabricated in a standard 0.18‐μm CMOS process (__f__~__T__~ = 45 GHz) with a maximum gain of 18 dB at 23.2 GHz and a 5.8‐dB noise figure is presented. Parallel feedback between the gate and drain is used in all three stages. This configuration als
A 30-GHz 10-dB low noise amplifier using standard 0.18-μm CMOS technology
✍ Scribed by Hsin-Lung Tu; Tsung-Yu Yang; Kung-Hao Liang; Hwann-Kaeo Chiou
- Publisher
- John Wiley and Sons
- Year
- 2007
- Tongue
- English
- Weight
- 192 KB
- Volume
- 49
- Category
- Article
- ISSN
- 0895-2477
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✦ Synopsis
Abstract
A three‐stage 30‐GHz low noise amplifier (LNA) was designed and fabricated in a standard 0.18‐μm CMOS technology. The LNA has demonstrated a 10‐dB gain and a minimum noise figure of 5.2 dB at 30 GHz. The achieved input 1‐dB compression point (IP~1 dB~) and third order intercept point (IP3) are −7 and +2.5 dBm, with total current of 16 mA from a 1.5‐V power supply. To the author's knowledge, the LNA shows the best overall performances ever reported in standard 0.18‐μm CMOS process. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 647–649, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22226
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