✦ LIBER ✦

Testing of multiple-output domino logic (MODL) CMOS circuits

✍ Scribed by Jha, N.K.; Tong, Q.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Testing for multiple faults in domino-CM

✍ Jha, N.K. 📂 Article 📅 1988 🏛 IEEE 🌐 English ⚖ 921 KB

Robust testing of CMOS logic circuits

✍ Niraj K. Jha 📂 Article 📅 1989 🏛 Elsevier Science 🌐 English ⚖ 545 KB

Testing of zipper CMOS logic circuits

✍ Tong, Q.; Jha, N.K. 📂 Article 📅 1990 🏛 IEEE 🌐 English ⚖ 470 KB

An implementation of multiple-valued log

✍ Izumi Sakata 📂 Article 📅 1989 🏛 John Wiley and Sons 🌐 English ⚖ 542 KB

Logic testing of bridging faults in CMOS

✍ Chess, B.; Larrabee, T. 📂 Article 📅 1998 🏛 IEEE 🌐 English ⚖ 172 KB

Compact 32-bit CMOS adder in multiple-ou

✍ Ruiz, G.A.; Manzano, M.A. 📂 Article 📅 2000 🏛 The Institution of Electrical Engineers 🌐 English ⚖ 397 KB