This is the first of two books presenting the challenges and future prospects of plasma etching processes for microelectronics, reviewing the past, present and future issues of etching processes in order to improve the understanding of these issues through innovative solutions.<br><br>This book focu
Plasma Etching Processes for Interconnect Realization in VLSI
โ Scribed by Nicolas Posseme
- Publisher
- Elsevier
- Year
- 2015
- Tongue
- English
- Leaves
- 111
- Edition
- 1
- Category
- Library
No coin nor oath required. For personal study only.
โฆ Synopsis
This is the first of two books presenting the challenges and future prospects of plasma etching processes for microelectronics, reviewing the past, present and future issues of etching processes in order to improve the understanding of these issues through innovative solutions.
This book focuses on back end of line (BEOL) for high performance device realization and presents an overview of all etch challenges for interconnect realization as well as the current etch solutions proposed in the semiconductor industry. The choice of copper/low-k interconnect architecture is one of the keys for integrated circuit performance, process manufacturability and scalability.
Today, implementation of porous low-k material is mandatory in order to minimize signal propagation delay in interconnections. In this context, the traditional plasma process issues (plasma-induced damage, dimension and profile control, selectivity) and new emerging challenges (residue formation, dielectric wiggling) are critical points of research in order to control the reliability and reduce defects in interconnects. These issues and potential solutions are illustrated by the authors through different process architectures available in the semiconductor industry (metallic or organic hard mask strategies).
- Presents the difficulties encountered for interconnect realization in very large-scale integrated (VLSI) circuits
- Focused on plasma-dielectric surface interaction
- Helps you further reduce the dielectric constant for the future technological nodes
โฆ Table of Contents
Content:
Front matter, Pages i,iii
Copyright, Page iv
List of Acronyms, Pages ix-xi
Preface, Pages xiii-xiv
1 - Introduction, Pages 1-13
2 - Interaction Plasma/Dielectric, Pages 15-43
3 - Porous SiOCH Film Integration, Pages 45-76
4 - Interconnects for Tomorrow, Pages 77-91
Bibliography, Pages 93-103
List of Authors, Page 105
Index, Pages 107-108
โฆ Subjects
VLSI ULSI Circuits Electrical Electronics Engineering Transportation Microelectronics Optoelectronics Semiconductors Sensors Solid State Transistors New Used Rental Textbooks Business Finance Communication Journalism Computer Science Education Humanities Law Medicine Health Sciences Reference Mathematics Social Test Prep Study Guides Specialty Boutique
๐ SIMILAR VOLUMES
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