✦ LIBER ✦

Leakage Power Characteristics of Dynamic Circuits in Nanometer CMOS Technologies

✍ Scribed by Liu, Z.; Kursun, V.

Book ID: 120608261
Publisher: IEEE
Year: 2006
Tongue: English
Weight: 543 KB
Volume: 53
Category: Article
ISSN: 1057-7130
DOI: 10.1109/TCSII.2006.876463

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Multi-Voltage CMOS Circuit Design (Kursu

Multi-Voltage CMOS Circuit Design (Kursun/Multi-Voltage CMOS Circuit Design) || Subthreshold Leakage Current Characteristics of Dynamic Circuits

✍ Kursun, Volkan; Friedman, Eby G. 📂 Article 📅 2006 🏛 John Wiley & Sons, Ltd 🌐 English ⚖ 501 KB

Subthreshold leakage power is expected to dominate the total power consumption of a CMOS circuit in the near future as depicted in Figure 10. 1 [5], [21], [29], [33]-[37]. Energy-efficient circuit techniques aimed at lowering leakage currents are, therefore, highly desirable. The subthreshold leakag

Design Solutions for Sample-and-Hold Cir

Design Solutions for Sample-and-Hold Circuits in CMOS Nanometer Technologies

✍ Centurelli, F.; Monsurro, P.; Pennisi, S.; Scotti, G.; Trifiletti, A. 📂 Article 📅 2009 🏛 Institute of Electrical and Electronics Engineers 🌐 English ⚖ 223 KB

Quantifying Error in Dynamic Power Estim

Quantifying Error in Dynamic Power Estimation of CMOS Circuits

✍ Puneet Gupta; Andrew B. Kahng; Swamy Muddu 📂 Article 📅 2005 🏛 Springer 🌐 English ⚖ 438 KB

Leakage current, active power, and delay

Leakage current, active power, and delay analysis of dynamic dual Vt CMOS circuits under P–V–T fluctuations

✍ Jinhui Wang; Na Gong; Ligang Hou; Xiaohong Peng; Ramalingam Sridhar; Wuchen Wu 📂 Article 📅 2011 🏛 Elsevier Science 🌐 English ⚖ 449 KB

Impact of Gate Leakage on Performances o

Impact of Gate Leakage on Performances of Phase-Locked Loop Circuit in Nanoscale CMOS Technology

✍ Jung-Sheng Chen; Ming-Dou Ker 📂 Article 📅 2009 🏛 IEEE 🌐 English ⚖ 867 KB

Design of 2VDD-Tolerant Power-Rail ESD C

Design of 2VDD-Tolerant Power-Rail ESD Clamp Circuit With Consideration of Gate Leakage Current in 65-nm CMOS Technology

✍ Chang-Tzu Wang; Ming-Dou Ker 📂 Article 📅 2010 🏛 IEEE 🌐 English ⚖ 851 KB