𝔖 Bobbio Scriptorium

✦ LIBER ✦

[IEEE Comput. Soc 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Monterey, CA, USA (3-5 Oct. 2005)] 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05) - Software-based self-test for pipelined processors: a case study

✍ Scribed by Hatzimihail, M.; Xenoulis, G.; Psarakis, M.; Gizopoulos, D.; Paschalis, A.

Book ID: 121237676
Publisher: IEEE Comput. Soc
Year: 2005
Weight: 356 KB
Category: Article
ISBN-13: 9780769524641
DOI: 10.1109/DFTVS.2005.63

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

[IEEE Comput. Soc 20th IEEE Internationa

[IEEE Comput. Soc 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Monterey, CA, USA (3-5 Oct. 2005)] 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05) - Defect characterization and tolerance of QCA sequential devices and circuits

✍ Momenzadeh, M.; Huang, J.; Lombardi, F. 📂 Article 📅 2005 🏛 IEEE Comput. Soc ⚖ 324 KB

[IEEE Comput. Soc 20th IEEE Internationa

[IEEE Comput. Soc 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Monterey, CA, USA (3-5 Oct. 2005)] 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05) - Soft error modeling and protection for sequential elements

✍ Asadi, H.; Tahoori, M.B. 📂 Article 📅 2005 🏛 IEEE Comput. Soc ⚖ 258 KB

[IEEE Comput. Soc 20th IEEE Internationa

[IEEE Comput. Soc 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Monterey, CA, USA (3-5 Oct. 2005)] 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05) - Modeling QCA defects at molecular-level in combinational circuits

✍ Momenzadeh, M.; Ottavi, M.; Lombardi, F. 📂 Article 📅 2005 🏛 IEEE Comput. Soc ⚖ 352 KB

[IEEE Comput. Soc 20th IEEE Internationa

[IEEE Comput. Soc 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Monterey, CA, USA (3-5 Oct. 2005)] 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05) - Computing cache vulnerability to transient errors and its implication

✍ Wei Zhang, 📂 Article 📅 2005 🏛 IEEE Comput. Soc ⚖ 236 KB

[IEEE Comput. Soc 20th IEEE Internationa

[IEEE Comput. Soc 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Monterey, CA, USA (3-5 Oct. 2005)] 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05) - A technique for modular design of self-checking carry-select adder

✍ Vasudevan, D.P.; Lala, P.K. 📂 Article 📅 2005 🏛 IEEE Comput. Soc ⚖ 269 KB

[IEEE Comput. Soc 20th IEEE Internationa

[IEEE Comput. Soc 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Monterey, CA, USA (3-5 Oct. 2005)] 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05) - QCA-based majority gate design under radius of effect-induced faults

✍ Patitz, Z.D.; Park, N.; Minsu Choi, ; Meyer, F.J. 📂 Article 📅 2005 🏛 IEEE Comput. Soc ⚖ 497 KB