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[IEEE 2010 28th VLSI Test Symposium (VTS) - Santa Cruz, CA, USA (2010.04.19-2010.04.22)] 2010 28th VLSI Test Symposium (VTS) - Low-power test planning for arbitrary at-speed delay-test clock schemes

โœ Scribed by Zoellin, Christian G.; Wunderlich, Hans-Joachim


Book ID
118039141
Publisher
IEEE
Year
2010
Weight
510 KB
Volume
0
Category
Article
ISBN
1424466490

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