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[IEEE 2007 IEEE Symposium on VLSI Technology - Kyoto, Japan (2007.06.12-2007.06.14)] 2007 IEEE Symposium on VLSI Technology - Highly Scalable Phase Change Memory with CVD GeSbTe for Sub 50nm Generation

✍ Scribed by Lee, J.I.; Park, H.; Cho, S.L.; Park, Y.L.; Bae, B.J.; Park, J.H.; Park, J.S.; An, H.G.; Bae, J.S.; Ahn, D.H.; Kim, Y.T.; Horii, H.; Song, S.A.; Shin, J.C.; Park, S.O.; Kim, H.S.; Chung, U-In.; Moon, J.T.; Ryu, B.I.

Book ID: 120027390
Publisher: IEEE
Year: 2007
Tongue: Japanese
Weight: 862 KB
Category: Article
ISBN: 4900784036
DOI: 10.1109/VLSIT.2007.4339744

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