𝔖 Bobbio Scriptorium

✦ LIBER ✦

[IEEE 2007 IEEE Symposium on VLSI Technology - Kyoto, Japan (2007.06.12-2007.06.14)] 2007 IEEE Symposium on VLSI Technology - 130 nm-technology, 0.25 ¿m2, 1T1C FRAM Cell for SoC (System-on-a-Chip)-friendly Applications

✍ Scribed by Hong, Y. K.; Jung, D. J.; Kang, S. K.; Kim, H. S.; Jung, J. Y.; Koh, H. K.; Park, J. H.; Choi, D. Y.; Kim, S. E.; Ann, W. S.; Kang, Y. M.; Kim, H. H.; Kim, J.-H.; Jung, W. U.; Lee, E. S.; Lee, S. Y.; Jeong, H. S.; Kim, Kinam

Book ID: 120020113
Publisher: IEEE
Year: 2007
Tongue: Japanese
Weight: 942 KB
Category: Article
ISBN: 4900784036
DOI: 10.1109/VLSIT.2007.4339704

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

[IEEE 2007 IEEE Symposium on VLSI Techno

[IEEE 2007 IEEE Symposium on VLSI Technology - Kyoto, Japan (2007.06.12-2007.06.14)] 2007 IEEE Symposium on VLSI Technology - Empirical Characteristics and Extraction of Overall Variations for 65-nm MOSFETs and Beyond

✍ Kanno, Michihiro; Shibuya, Akira; Matsumura, Masao; Tamura, Kazuhiro; Tsuno, Hit 📂 Article 📅 2007 🏛 IEEE 🌐 Japanese ⚖ 717 KB

[IEEE 2007 IEEE Symposium on VLSI Techno

[IEEE 2007 IEEE Symposium on VLSI Technology - Kyoto, Japan (2007.06.12-2007.06.14)] 2007 IEEE Symposium on VLSI Technology - Highly Scalable Phase Change Memory with CVD GeSbTe for Sub 50nm Generation

✍ Lee, J.I.; Park, H.; Cho, S.L.; Park, Y.L.; Bae, B.J.; Park, J.H.; Park, J.S.; A 📂 Article 📅 2007 🏛 IEEE 🌐 Japanese ⚖ 862 KB

[IEEE 2007 IEEE Symposium on VLSI Techno

[IEEE 2007 IEEE Symposium on VLSI Technology - Kyoto, Japan (2007.06.12-2007.06.14)] 2007 IEEE Symposium on VLSI Technology - BSIM-MG: A Versatile Multi-Gate FET Model for Mixed-Signal Design

✍ Dunga, Mohan V.; Lin, Chung-Hsun; Lu, Darsen D.; Xiong, Weize; Cleavelin, C. R.; 📂 Article 📅 2007 🏛 IEEE 🌐 Japanese ⚖ 884 KB

[IEEE 2007 IEEE Symposium on VLSI Techno

[IEEE 2007 IEEE Symposium on VLSI Technology - Kyoto, Japan (2007.06.12-2007.06.14)] 2007 IEEE Symposium on VLSI Technology - Dependable Integration of Full-Porous Low-k Interconnect and Low-leakage/ Low-cost Transistor for 45nm LSTP Platform

✍ Sukegawa, K.; Yamamoto, T.; Kudo, H.; Kubo, T.; Sukegawa, T.; Ehara, H.; Ochmizu 📂 Article 📅 2007 🏛 IEEE 🌐 Japanese ⚖ 585 KB

[IEEE 2007 IEEE Symposium on VLSI Techno

[IEEE 2007 IEEE Symposium on VLSI Technology - Kyoto, Japan (2007.06.12-2007.06.14)] 2007 IEEE Symposium on VLSI Technology - Reliable 3D Damascene MIM architecture embedded into Cu interconnect for a Ta2O5 capacitor record density of 17 fF/¿m2

✍ Thomas, M.; Farcy, A.; Perrot, C.; Deloffre, E.; Gros-Jean, M.; Benoit, D.; Rich 📂 Article 📅 2007 🏛 IEEE 🌐 Japanese ⚖ 836 KB

[IEEE 2007 IEEE Symposium on VLSI Techno

[IEEE 2007 IEEE Symposium on VLSI Technology - Kyoto, Japan (2007.06.12-2007.06.14)] 2007 IEEE Symposium on VLSI Technology - Fully Integrated VLSI CMOS and Photonics "CMOS Photonics"

✍ Gunn, Cary 📂 Article 📅 2007 🏛 IEEE 🌐 Japanese ⚖ 935 KB