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High-level delay test generation for modular circuits

✍ Scribed by Joonhwan Yi; Hayes, J.P.


Book ID
111675848
Publisher
IEEE
Year
2006
Tongue
English
Weight
826 KB
Volume
25
Category
Article
ISSN
0278-0070

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πŸ“œ SIMILAR VOLUMES


A high-speed test-generation method usin
✍ Fumiyasu Hirose; Koichiro Takayama; Nobuaki Kawato πŸ“‚ Article πŸ“… 1990 πŸ› John Wiley and Sons 🌐 English βš– 663 KB

## Abstract This paper discusses the test‐generation circuit which automatically generates a test pattern for a combinational circuit. The test‐generation circuit is designed so that two algorithms of automatic test generation and fault simulation can be executed by the circuit. The test pattern fo