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Design of testing circuit and test generation for built-in current testing

✍ Scribed by Yukiya Miura; Yasushi Wada; Kozo Kinoshita

Publisher
John Wiley and Sons
Year
1993
Tongue
English
Weight
736 KB
Volume
24
Category
Article
ISSN
0882-1666

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✦ Synopsis

Abstract

Recently current testing is beginning to be noticed as a testing method for CMOS circuits. However, since CMOS circuits cause the dynamic current due to switching, it has been pointed out that testing at a fast clock rate by current testing is difficult. To cope with this problem a built‐in current testing circuit is proposed in this paper. It is a circuit which measures the value of the dynamic current integrated over a unit time. Next a test sequence generation method for the proposed circuit is presented. In this method test sequences are generated so that the numbers of changes in the gate output values for two consecutive test vectors are almost equal. As a result the dynamic current does not change much between consecutive vectors. Finally the results of test generation for ISCAS'85 benchmark circuits are shown.

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