## Abstract Recently current testing is beginning to be noticed as a testing method for CMOS circuits. However, since CMOS circuits cause the dynamic current due to switching, it has been pointed out that testing at a fast clock rate by current testing is difficult. To cope with this problem a buil
Design of ICs applying built-in current testing
β Scribed by Wojciech Maly; Marek Patyra
- Publisher
- Springer US
- Year
- 1992
- Tongue
- English
- Weight
- 828 KB
- Volume
- 3
- Category
- Article
- ISSN
- 0923-8174
No coin nor oath required. For personal study only.
β¦ Synopsis
Built-in Current (BIC)
sensors have proven to be very useful in testing static CMOS ICs. In a number of experimental ICs BIC sensors were able to detect small abnormal Ioo Q currents. This paper discusses the design of the circuit under test and Built-in Current (BIC) sensors, which provide: maximum level of defect detectability, minimum impact of BIC sensor on the performance of the circuit under test and minimum area overhead needed for BIC sensors implementation.
π SIMILAR VOLUMES
## Abstract With respect to CMOS logic circuits, it is reported that a fault can occur cannot be covered by conventional classical fault model, and the current testing is considered to be interesting as a testing method to detect such a fault. This paper proposes a faultβdetection method for the C
This article presents a new concept for built-in self test of switched current circuits based on $2I memory cells. From the spectrum of possible transistor defects reported in CMOS processes [2], five different faultsituations were modelled and the ability to detect the various failures was studied