𝔖 Bobbio Scriptorium
✦   LIBER   ✦

A reconfigurable parallel architecture for a fuzzy processor

✍ Scribed by G. Ascia; V. Catania; A. Puliafito; L. Vita


Publisher
Elsevier Science
Year
1996
Tongue
English
Weight
745 KB
Volume
88
Category
Article
ISSN
0020-0255

No coin nor oath required. For personal study only.


πŸ“œ SIMILAR VOLUMES


Design of a reconfigurable VLSI processo
✍ Yoshichika Fujioka; Michitaka Kameyama πŸ“‚ Article πŸ“… 1999 πŸ› John Wiley and Sons 🌐 English βš– 339 KB πŸ‘ 2 views

In realization of intelligent robots with the capability of quick response to altering environments, it is necessary to reduce the operation delay time of the sensor input signal to the control output. In this article, dynamically reconfigurable multioperand multiplication-addition based on bit-seri

A multiagent architecture for fuzzy mode
✍ M. Delgado; A. F. GΓ³mez-Skarmeta; J. GΓ³mez MarΓ­n-BlΓ‘zquez; H. MartΓ­nez BarberΓ‘ πŸ“‚ Article πŸ“… 1999 πŸ› John Wiley and Sons 🌐 English βš– 243 KB

In this paper a hybrid learning system that combines different fuzzy modeling techniques is being investigated. In order to implement the different methods, we propose the use of intelligent agents, which collaborate by means of a multiagent architecture. This approach, involving agents which embody

An integrated co-processor architecture
✍ Holger Bock; Wolfgang Mayerwieser; Karl C. Posch; Reinhard Posch; Volker Schindl πŸ“‚ Article πŸ“… 1997 πŸ› Elsevier Science 🌐 English βš– 551 KB

A prototype VLSI design for a new smartcard co-processor for fast modular arithmetic with long integers is described. We present design criteria, objectives for selecting algorithms, the co-processor's structure, and some implementation details. Emphasis is also put on the manifold constraints which