✦ LIBER ✦

A low-power-consumption architecture for embedded processors

✍ Scribed by Yukihiro Yoshida; Bao-Yu Song; Hiroyuki Okuhata; Takao Onoye; Isao Shirakawa

Publisher: John Wiley and Sons
Year: 1998
Tongue: English
Weight: 131 KB
Volume: 81
Category: Article
ISSN: 1042-0967
DOI: 10.1002/(sici)1520-6440(199810)81:10<83::aid-ecjc8>3.0.co;2-s

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A reconfigurable parallel architecture f

A reconfigurable parallel architecture for a fuzzy processor

✍ G. Ascia; V. Catania; A. Puliafito; L. Vita 📂 Article 📅 1996 🏛 Elsevier Science 🌐 English ⚖ 745 KB

A fast electrostatic chopper of low powe

A fast electrostatic chopper of low power consumption

✍ P.G. Bizzeti; T. Fazzini; N. Taccetti 📂 Article 📅 1979 🏛 Elsevier Science ⚖ 142 KB

An integrated co-processor architecture

An integrated co-processor architecture for a smartcard

✍ Holger Bock; Wolfgang Mayerwieser; Karl C. Posch; Reinhard Posch; Volker Schindl 📂 Article 📅 1997 🏛 Elsevier Science 🌐 English ⚖ 551 KB

A prototype VLSI design for a new smartcard co-processor for fast modular arithmetic with long integers is described. We present design criteria, objectives for selecting algorithms, the co-processor's structure, and some implementation details. Emphasis is also put on the manifold constraints which

Low-power consumption 1×4 “cascade switc

Low-power consumption 1×4 “cascade switch” for microwave applications

✍ Ian Cayrefourcq; Michel Schaller; Jean-Pierre Vilcot; Joseph Harari; Jean Philip 📂 Article 📅 1998 🏛 John Wiley and Sons 🌐 English ⚖ 183 KB

We present the design and realization of a 1 = 4 switching matrix, based on an electro-optical directional coupler. This matrix is de¨oted to true time delay systems. It is characterized by an original topology that reduces global power consumption down to 20 mW. Fiber-to-fiber losses are 15 dB, and

A network processor-based architecture f

A network processor-based architecture for multi-gigabit traffic analysis

✍ A. Di Pietro; D. Ficara; S. Giordano; F. Oppedisano; G. Procissi; F. Vitucci 📂 Article 📅 2009 🏛 John Wiley and Sons 🌐 English ⚖ 703 KB

A C-band ultra-low-power consumption HMI

A C-band ultra-low-power consumption HMIC amplifier for intelligent transportation system applications

✍ Guangjun Wen; Choi Look Law; Zhongxiang Shen; Sheel Aditya; Chao Li 📂 Article 📅 2002 🏛 John Wiley and Sons 🌐 English ⚖ 141 KB

## Abstract A multi‐stage hybrid integrated ultra‐low‐power‐consumption amplifier using a low‐cost silicon bipolar junction transistor for intelligent transportation system (ITS) applications is developed at 5.8 GHz. Under a low dc‐power bias of 3.0 V and 0.92 mA, the designed amplifier shows the s