✦ LIBER ✦

A 70 ns 256K DRAM with bit-line shield

✍ Scribed by Mashiko, K.; Kobayashi, T.; Miyamoto, H.; Arimoto, K.; Morooka, Y.; Hatanaka, M.; Yamada, M.; Nakano, T.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A sub-100 ns 256K DRAM with open bit lin

✍ Nakano, T.; Yabu, T.; Noguchi, E.; Shirai, K.; Miyasaka, K. 📂 Article 📅 1983 🏛 IEEE 🌐 English ⚖ 792 KB

A 90 ns 256K x 1 bit DRAM with double-le

✍ Fujii, T.; Mitake, K.; Tada, K.; Inoue, Y.; Watanabe, H.; Kudoh, O.; Yamamoto, H 📂 Article 📅 1983 🏛 IEEE 🌐 English ⚖ 653 KB

A 60-ns 16-Mbit DRAM with a minimized se

✍ Chou, S.; Takano, T.; Kita, A.; Ichikawa, F.; Uesugi, M. 📂 Article 📅 1989 🏛 IEEE 🌐 English ⚖ 865 KB

A 5.8-ns 256-Kb BiCMOS TTL SRAM with T-S

✍ Shiomi, T.; Wada, T.; Ohbayashi, S.; Ohba, A.; Honda, H.; Ishigaki, Y.; Hine, S. 📂 Article 📅 1993 🏛 IEEE 🌐 English ⚖ 718 KB

A 4-Mbit DRAM with half-internal-voltage

✍ Takada, M.; Takeshima, T.; Sakamoto, M.; Shimizu, T.; Abiko, H.; Katoh, T.; Kiku 📂 Article 📅 1986 🏛 IEEE 🌐 English ⚖ 999 KB

A 60-ns 16-Mbit CMOS DRAM with a transpo

✍ Aoki, M.; Nakagome, Y.; Horiguchi, M.; Tanaka, H.; Ikenaga, S.; Etoh, J.; Kawamo 📂 Article 📅 1988 🏛 IEEE 🌐 English ⚖ 741 KB