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A 60-ns 16-Mbit CMOS DRAM with a transposed data-line structure

✍ Scribed by Aoki, M.; Nakagome, Y.; Horiguchi, M.; Tanaka, H.; Ikenaga, S.; Etoh, J.; Kawamoto, Y.; Kimura, S.; Takeda, E.; Sunami, H.; Itoh, K.

No coin nor oath required. For personal study only.

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