An experimental 16-Mbit CMOS DRAM chip with a 100-MHz serial read/write mode

✍ Scribed by Watanabe, S.; Oowaki, Y.; Itoh, Y.; Sakui, K.; Numata, K.; Fuse, T.; Kobayashi, T.; Tsuchida, K.; Chiba, M.; Hara, T.; Ohta, M.; Horiguchi, F.; Hieda, K.; Mitayama, A.; Hamamoto, T.; Ohuchi, K.; Masuoka, F.

• Book ID: 119774148
• Publisher: IEEE
• Year: 1989
• Tongue: English
• Weight: 764 KB
• Volume: 24
• Category: Article
• ISSN: 0018-9200
• DOI: 10.1109/4.32038