✦ LIBER ✦

A 15-b 40-MS/s CMOS pipelined analog-to-digital converter with digital background calibration

✍ Scribed by Hung-Chih Liu; Zwei-Mei Lee; Jieh-Tsorng Wu

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Correction to “A 15-Bit 40-MS/s CMOS Pip

✍ Liu, H.-C.; Lee, Z.-M.; Wu, J.-T. 📂 Article 📅 2005 🏛 IEEE 🌐 English ⚖ 34 KB

A 12-bit 20-Msample/s pipelined analog-t

✍ Xiaoyue Wang; Hurst, P.J.; Lewis, S.H. 📂 Article 📅 2004 🏛 IEEE 🌐 English ⚖ 906 KB

A power-efficient 10-bit 40-MS/s sub-sam

✍ Guanghua Shu; Yao Guo; Junyan Ren; Mingjun Fan; Fan Ye 📂 Article 📅 2011 🏛 Springer 🌐 English ⚖ 767 KB

An 8-bit 80-Msample/s pipelined analog-t

✍ Jun Ming; Lewis, S.H. 📂 Article 📅 2001 🏛 IEEE 🌐 English ⚖ 218 KB

A 10-bit 60-MS/s Low-Power CMOS Pipeline

✍ Lu, Chi-Chang; Lee, Tsung-Sum 📂 Article 📅 2007 🏛 IEEE 🌐 English ⚖ 672 KB

A 10-b 120-Msample/s time-interleaved an

✍ Jamal, S.M.; Daihong Fu; Chang, N.C.-J.; Hurst, P.J.; Lewis, S.H. 📂 Article 📅 2002 🏛 IEEE 🌐 English ⚖ 676 KB