✦ LIBER ✦

A 10-bit 60-MS/s Low-Power CMOS Pipelined Analog-to-Digital Converter

✍ Scribed by Lu, Chi-Chang; Lee, Tsung-Sum

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A power-efficient 10-bit 40-MS/s sub-sam

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A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline

✍ Abo, A.M.; Gray, P.R. 📂 Article 📅 1999 🏛 IEEE 🌐 English ⚖ 373 KB

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✍ Liu, H.-C.; Lee, Z.-M.; Wu, J.-T. 📂 Article 📅 2005 🏛 IEEE 🌐 English ⚖ 34 KB

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✍ Hyde, J.; Humes, T.; Diorio, C.; Thomas, M.; Figueroa, M. 📂 Article 📅 2003 🏛 IEEE 🌐 English ⚖ 740 KB

A 15-b 40-MS/s CMOS pipelined analog-to-

✍ Hung-Chih Liu; Zwei-Mei Lee; Jieh-Tsorng Wu 📂 Article 📅 2005 🏛 IEEE 🌐 English ⚖ 584 KB

A 10-bit 200-MS/s CMOS parallel pipeline

✍ Sumanen, L.; Waltari, M.; Halonen, K.A.I. 📂 Article 📅 2001 🏛 IEEE 🌐 English ⚖ 176 KB