Voltage-mode CMOS quaternary latch circuit

Quaternary voltage-mode CMOS circuits fo

Quaternary voltage-mode CMOS circuits for multiple-valued logic

✍ Thoidis, I.; Soudris, D.; Karafyllidis, I.; Christoforidis, S.; Thanailakis, A. 📂 Article 📅 1998 🏛 The Institution of Electrical Engineers 🌐 English ⚖ 615 KB

A novel Voltage-mode CMOS quaternary log

A novel Voltage-mode CMOS quaternary logic design

✍ da Silva, R.C.G.; Boudinov, H.; Carro, L. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 159 KB

Modeling Latch-Up in CMOS Integrated Cir

Modeling Latch-Up in CMOS Integrated Circuits

✍ Estreich, D.B.; Dutton, R.W. 📂 Article 📅 1982 🏛 IEEE 🌐 English ⚖ 1007 KB

Multi-Voltage CMOS Circuit Design (Kursu

Multi-Voltage CMOS Circuit Design (Kursun/Multi-Voltage CMOS Circuit Design) || Bibliography

✍ Kursun, Volkan; Friedman, Eby G. 📂 Article 📅 2006 🏛 John Wiley & Sons, Ltd 🌐 English ⚖ 252 KB

This book presents an in-depth treatment of various power reduction and speed enhancement techniques based on multiple supply and threshold voltages. A detailed discussion of the sources of power consumption in CMOS circuits will be provided whilst focusing primarily on identifying the mechanisms by

Multi-Voltage CMOS Circuit Design (Kursu

Multi-Voltage CMOS Circuit Design (Kursun/Multi-Voltage CMOS Circuit Design) || Conclusions

✍ Kursun, Volkan; Friedman, Eby G. 📂 Article 📅 2006 🏛 John Wiley & Sons, Ltd 🌐 English ⚖ 216 KB

This book presents an in-depth treatment of various power reduction and speed enhancement techniques based on multiple supply and threshold voltages. A detailed discussion of the sources of power consumption in CMOS circuits will be provided whilst focusing primarily on identifying the mechanisms by

Multi-Voltage CMOS Circuit Design (Kursu

Multi-Voltage CMOS Circuit Design (Kursun/Multi-Voltage CMOS Circuit Design) || Index

✍ Kursun, Volkan; Friedman, Eby G. 📂 Article 📅 2006 🏛 John Wiley & Sons, Ltd 🌐 English ⚖ 203 KB

This book presents an in-depth treatment of various power reduction and speed enhancement techniques based on multiple supply and threshold voltages. A detailed discussion of the sources of power consumption in CMOS circuits will be provided whilst focusing primarily on identifying the mechanisms by