Verification by error modeling : using testing techniques in hardware verification

✍ Scribed by Katarzyna Radecka; Zeljko Zilic

Publisher: Kluwer Academic Publishers
Year: 2003
Tongue: English
Leaves: 224
Series: Frontiers in electronic testing, 25
Category: Library

No coin nor oath required. For personal study only.

✦ Table of Contents

front-matter......Page 0
01......Page 13
02......Page 30
03......Page 62
04......Page 81
05......Page 113
06......Page 139
07......Page 157
08......Page 197
back-matter......Page 201

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