Reasoning in Boolean Networks: Logic Synthesis and Verification using Testing Techniques

✍ Scribed by Wolfgang Kunz, Dominik Stoffel (auth.)

Publisher: Springer US
Year: 1997
Tongue: English
Leaves: 234
Series: Frontiers in Electronic Testing 9
Edition: 1
Category: Library

No coin nor oath required. For personal study only.

✦ Synopsis

Reasoning in Boolean Networks provides a detailed treatment of recent research advances in algorithmic techniques for logic synthesis, test generation and formal verification of digital circuits. The book presents the central idea of approaching design automation problems for logic-level circuits by specific Boolean reasoning techniques.
While Boolean reasoning techniques have been a central element of two-level circuit theory for many decades Reasoning in BooleanNetworks describes a basic reasoning methodology for multi-level circuits. This leads to a unified view on two-level and multi-level logic synthesis. The presented reasoning techniques are applied to various CAD-problems to demonstrate their usefulness for today's industrially relevant problems.
Reasoning in Boolean Networks provides lucid descriptions of basic algorithmic concepts in automatic test pattern generation, logic synthesis and verification and elaborates their intimate relationship to provide further intuition and insight into the subject. Numerous examples are provide for ease in understanding the material.
Reasoning in Boolean Networks is intended for researchers in logic synthesis, VLSI testing and formal verification as well as for integrated circuit designers who want to enhance their understanding of basic CAD methodologies.

✦ Table of Contents

Front Matter....Pages i-xv
Preliminaries....Pages 1-15
Combinational ATPG....Pages 17-47
Recursive Learning....Pages 49-73
AND/OR Reasoning Graphs....Pages 75-99
Logic Optimization....Pages 101-161
Logic Verification....Pages 163-195
Conclusions and Future Work....Pages 197-199
Back Matter....Pages 201-230

✦ Subjects

Computer-Aided Engineering (CAD, CAE) and Design; Electrical Engineering

📜 SIMILAR VOLUMES

Logic Synthesis for Genetic Diseases: Mo

📁 Logic Synthesis for Genetic Diseases: Modeling Disease Behavior Using Boolean Networks

✍ Pey-Chang Kent Lin, Sunil P. Khatri (auth.) 📂 Library 📅 2014 🏛 Springer-Verlag New York 🌐 English

<p>This book brings to bear a body of logic synthesis techniques, in order to contribute to the analysis and control of Boolean Networks (BN) for modeling genetic diseases such as cancer. The authors provide several VLSI logic techniques to model the genetic disease behavior as a BN, with powerful i

Logic Synthesis for Genetic Diseases: Mo

📁 Logic Synthesis for Genetic Diseases: Modeling Disease Behavior Using Boolean Networks

✍ Pey-Chang Kent Lin, Sunil P. Khatri 📂 Library 📅 2013 🏛 Springer 🌐 English

This book brings to bear a body of logic synthesis techniques, in order to contribute to the analysis and control of Boolean Networks (BN) for modeling genetic diseases such as cancer. The authors provide several VLSI logic techniques to model the genetic disease behavior as a BN, with powerful impl

Logic Synthesis and Verification

📁 Logic Synthesis and Verification

✍ Hassoun S., Sasao T. (ed.) 📂 Library 📅 2001 🏛 Springer 🌐 English

Research and development of logic synthesis and verification have matured considerably over the past two decades. Many commercial products are available, and they have been critical in harnessing advances in fabrication technology to produce today's plethora of electronic components. While this

Logic synthesis and verification

📁 Logic synthesis and verification

✍ Soha Hassoun; Tsutomu Sasao 📂 Library 📅 2002 🏛 Kluwer Academic Publishers 🌐 English

Verification by error modeling : using t

📁 Verification by error modeling : using testing techniques in hardware verification

✍ Katarzyna Radecka; Zeljko Zilic 📂 Library 📅 2003 🏛 Kluwer Academic Publishers 🌐 English

Verification by Error Modeling: Using Te

📁 Verification by Error Modeling: Using Testing Techniques in Hardware Verification

✍ Katarzyna Radecka, Zeljko Zilic (auth.) 📂 Library 📅 2004 🏛 Springer US 🌐 English

<p>1. DESIGN FLOW Integrated circuit (IC) complexity is steadily increasing. ICs incorporating hundreds of millions of transistors, mega-bit memories, complicated pipelined structures, etc., are now in high demand. For example, Intel Itanium II processor contains more than 200 million transistors, i