✦ LIBER ✦

Twisted bit-line architectures for multi-megabit DRAMs

✍ Scribed by Hidaka, H.; Fujishima, K.; Matsuda, Y.; Asakura, M.; Yoshihara, T.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Analysis of coupling noise between adjac

✍ Konishi, Y.; Kumanoya, M.; Yamasaki, H.; Dosaka, K.; Yoshihara, T. 📂 Article 📅 1989 🏛 IEEE 🌐 English ⚖ 701 KB

Cell-plate line connecting complementary

✍ Asakura, M.; Arimoto, K.; Hidaka, H.; Fujishima, K. 📂 Article 📅 1992 🏛 IEEE 🌐 English ⚖ 652 KB

A full bit prefetch architecture for syn

✍ Sunaga, T.; Hosokawa, K.; Nakamura, Y.; Ichinose, M.; Moriwaki, A.; Kakimi, S.; 📂 Article 📅 1995 🏛 IEEE 🌐 English ⚖ 743 KB

Influence of Bit-Line Coupling and Twist

✍ Zaid Al-Ars; Said Hamdioui; Ad J. van de Goor; Sultan Al-Harbi 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 447 KB

Word-line architecture for highly reliab

✍ Takashima, D.; Oowaki, Y.; Ogiwara, R.; Watanabe, Y.; Tsuchida, K.; Ohta, M.; Na 📂 Article 📅 1992 🏛 IEEE 🌐 English ⚖ 742 KB

A divided/shared bit-line sensing scheme

✍ Hidaka, H.; Matsuda, Y.; Fujishama, K. 📂 Article 📅 1991 🏛 IEEE 🌐 English ⚖ 613 KB