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Solder pastes for microelectronics: Ronald P Anjard, Sr. Microelectron. J. 15 (2), 53 (1984)


Book ID
104157601
Publisher
Elsevier Science
Year
1987
Tongue
English
Weight
102 KB
Volume
18
Category
Article
ISSN
0026-2692

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โœฆ Synopsis


Reliability of ECL 100k devices using AI (4% wt Cu, 1% wt Si) double level metalisation, isoplanar technology with shallow, 0.25 #m, base-emitter junctions was evaluated by means of high current and high temperature stresses. Three failure modes connected with electromigration phenomena were found in the output transistor (a) base-emitter shunts owing to junction spiking caused by AI-Si interdiffusion enhanced by dectromigration; (b) collector-emitter shorts due to the breaking of the dielectric oxide between two super imposed metal levels owing to material transport and pileup in the underlying metallisation; (c) open circuit of the output emitter due to avoid growth in the Cu-depleted areas of the AI interconnections. After B-E shunts, failure mechanism evolves towards two different sequences of failure modes, according to the different transistor structures; in fact C-E shorts were found to occur only when collector and emitter metals are superimposed, while the open circuit of the output emitter is the final failure for all configurations. The earlier and more frequent failure mode observed is the resistive shunt of the base-emitter junction of the output transistor, in agreement with previously reported data on electromigration effects in AI (Cu, Si) metallisations used both as interconnections and as contacts to shallow junctions.


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