Soft Error Reliability of VLSI Circuits: Analysis and Mitigation Techniques

✍ Scribed by Behnam Ghavami, Mohsen Raji

Publisher: Springer International Publishing;Springer
Year: 2021
Tongue: English
Leaves: 119
Edition: 1st ed.
Category: Library

No coin nor oath required. For personal study only.

✦ Synopsis

This book is intended for readers who are interested in the design of robust and reliable electronic digital systems. The authors cover emerging trends in design of today’s reliable electronic systems which are applicable to safety-critical applications, such as automotive or healthcare electronic systems. The emphasis is on modeling approaches and algorithms for analysis and mitigation of soft errors in nano-scale CMOS digital circuits, using techniques that are the cornerstone of Computer Aided Design (CAD) of reliable VLSI circuits. The authors introduce software tools for analysis and mitigation of soft errors in electronic systems, which can be integrated easily with design flows. In addition to discussing soft error aware analysis techniques for combinational logic, the authors also describe new soft error mitigation strategies targeting commercial digital circuits. Coverage includes novel Soft Error Rate (SER) analysis techniques such as process variation aware SER estimation and GPU accelerated SER analysis techniques, in addition to SER reduction methods such as gate sizing and logic restructuring based SER techniques.

✦ Table of Contents

Front Matter ....Pages i-xiii
Introduction: Soft Error Modeling (Behnam Ghavami, Mohsen Raji)....Pages 1-7
Soft Error Rate Estimation of VLSI Circuits (Behnam Ghavami, Mohsen Raji)....Pages 9-23
Process Variation-Aware Soft Error Rate Estimation Method for Integrated Circuits (Behnam Ghavami, Mohsen Raji)....Pages 25-43
GPU-Accelerated Soft Error Rate Analysis of Large-Scale Integrated Circuits (Behnam Ghavami, Mohsen Raji)....Pages 45-54
FPGA Hardware Acceleration of Soft Error Rate Estimation of Digital Circuits (Behnam Ghavami, Mohsen Raji)....Pages 55-73
Soft Error Tolerant Circuit Design Using Partitioning-Based Gate Sizing (Behnam Ghavami, Mohsen Raji)....Pages 75-92
Resynthesize Technique for Soft Error-Tolerant Design of Combinational Circuits (Behnam Ghavami, Mohsen Raji)....Pages 93-107
Back Matter ....Pages 109-114

✦ Subjects

Engineering; Circuits and Systems; Electronics and Microelectronics, Instrumentation

📜 SIMILAR VOLUMES

Analysis and Design of Resilient VLSI Ci

📁 Analysis and Design of Resilient VLSI Circuits: Mitigating Soft Errors and Process Variations

✍ Rajesh Garg, Sunil P. Khatri (auth.) 📂 Library 📅 2010 🏛 Springer US 🌐 English

This book is motivated by the challenges faced in designing reliable integratedsystems using modern VLSI processes. The reliable operation of Integrated Circuits (ICs) has become increasingly difficult to achieve in the deep sub-micron (DSM) era. With continuously decreasing device feature siz

Analysis and Design of Resilient VLSI Ci

📁 Analysis and Design of Resilient VLSI Circuits: Mitigating Soft Errors and Process Variations

✍ Rajesh Garg, Sunil P. Khatri (auth.) 📂 Library 📅 2010 🏛 Springer US 🌐 English

Mitigating Process Variability and Soft

📁 Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs

✍ Alexandra Zimpeck, Cristina Meinhardt, Laurent Artola, Ricardo Reis 📂 Library 📅 2021 🏛 Springer 🌐 English

This book evaluates the influence of process variations (e.g. work-function fluctuations) and radiation-induced soft errors in a set of logic cells using FinFET technology, considering the 7nm technological node as a case study. Moreover, for accurate soft error estimation, the authors adop

Soft Error Mechanisms, Modeling and Miti

📁 Soft Error Mechanisms, Modeling and Mitigation

✍ Selahattin Sayil (auth.) 📂 Library 📅 2016 🏛 Springer International Publishing 🌐 English

This book introduces readers to various radiation soft-error mechanisms such as soft delays, radiation induced clock jitter and pulses, and single event (SE) coupling induced effects. In addition to discussing various radiation hardening techniques for combinational logic, the author also describ

Hot-Carrier Reliability of MOS VLSI Circ

📁 Hot-Carrier Reliability of MOS VLSI Circuits

✍ Yusuf Leblebici, Sung-Mo (Steve) Kang (auth.) 📂 Library 📅 1993 🏛 Springer US 🌐 English

As the complexity and the density of VLSI chips increase with shrinking design rules, the evaluation of long-term reliability of MOS VLSI circuits is becoming an important problem. The assessment and improvement of reliability on the circuit level should be based on both the failure mode analysis

Symbolic Analysis and Reduction of VLSI

📁 Symbolic Analysis and Reduction of VLSI Circuits

✍ Zhanhai Qin, Chung-Kuan Cheng 📂 Library 📅 2004 🏛 Springer 🌐 English

Symbolic analysis is an intriguing topic in VLSI designs. The analysis methods are crucial for the applications to the parasitic reduction and analog circuit evaluation. However, analyzing circuits symbolically remains a challenging research issue. Therefore, in this book, we survey the r