✦ LIBER ✦

Prolog to IDDQ testing for CMOS VLSI

✍ Scribed by Esch, J.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Test generation for IDDQ testing of brid

✍ Bollinger, S.W.; Midkiff, S.F. 📂 Article 📅 1994 🏛 IEEE 🌐 English ⚖ 726 KB

Iddq Testing for CMOS VLSI: Rochit Rajsu

✍ Draeiša P. Milovanović 📂 Article 📅 1995 🏛 Elsevier Science 🌐 English ⚖ 81 KB

Analysis of Application of the IDDQ Tech

✍ Chih-Wen Lu; Chung Len Lee; Chauchin Su; Jwu-E Chen 📂 Article 📅 2002 🏛 Springer US 🌐 English ⚖ 96 KB

A simple built-in current sensor for IDD

✍ A. Srivastava; S. Aluri; A.K. Chamakura 📂 Article 📅 2005 🏛 Elsevier Science 🌐 English ⚖ 938 KB

4587480 Delay testing method for CMOS LS

✍ John Zasio 📂 Article 📅 1987 🏛 Elsevier Science 🌐 English ⚖ 88 KB

Compact high-frequency output buffer for

✍ Van Peteghem, P.M.; Duque-Carrillo, J.F. 📂 Article 📅 1989 🏛 IEEE 🌐 English ⚖ 397 KB