✦ LIBER ✦

Performance-driven placement procedure for low power

✍ Scribed by Masaya Yoshikawa; Hidekazu Terai

Publisher: John Wiley and Sons
Year: 2005
Tongue: English
Weight: 833 KB
Volume: 151
Category: Article
ISSN: 0424-7760
DOI: 10.1002/eej.20057

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Multiphase synchronous circuits for low

Multiphase synchronous circuits for low power performance

✍ R. Andrew; K. Venos 📂 Article 📅 1998 🏛 Elsevier Science 🌐 English ⚖ 446 KB

High performance low power CMOS dynamic

High performance low power CMOS dynamic logic for arithmetic circuits

✍ Victor Navarro-Botello; Juan A. Montiel-Nelson; Saeid Nooshabadi 📂 Article 📅 2007 🏛 Elsevier Science 🌐 English ⚖ 296 KB

Deep-submicron CMOS technologies for low

Deep-submicron CMOS technologies for low-power and high-performance operation

✍ Manabu Deura; Yasuo Nara; Tatsuya Yamazaki; Kenichi Gotoh; Fumio Ohtake; Hajime 📂 Article 📅 1996 🏛 John Wiley and Sons 🌐 English ⚖ 658 KB

Mixed Full Adder topologies for high-per

Mixed Full Adder topologies for high-performance low-power arithmetic circuits

✍ M. Alioto; G. Di Cataldo; G. Palumbo 📂 Article 📅 2007 🏛 Elsevier Science 🌐 English ⚖ 217 KB

A low-power design method for FPGA using

A low-power design method for FPGA using extra flip-flops driven by phase-shifted clock

✍ Toshihiro Katashita; Atsushi Maeda; Yoshinori Yamaguchi 📂 Article 📅 2007 🏛 John Wiley and Sons 🌐 English ⚖ 749 KB

High-performance low-power 27-GHz CMOS v

High-performance low-power 27-GHz CMOS voltage-controlled oscillator for Ka-band applications

✍ Mei-Ling Yeh; Yao-Chian Lin; Chung-Cheng Chang 📂 Article 📅 2011 🏛 John Wiley and Sons 🌐 English ⚖ 243 KB

## Abstract A new low‐power 27.07‐GHz voltage controlled oscillator is designed for Ka‐band applications in this article. Body bias technique is used for the low‐power and low‐phase noise VCO design. The VCO can be tuned from 26.35 to 27.102 GHz. The measured phase noise is −106.2 dBc/Hz at 1 MHz o