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High performance low power CMOS dynamic logic for arithmetic circuits

✍ Scribed by Victor Navarro-Botello; Juan A. Montiel-Nelson; Saeid Nooshabadi

Publisher: Elsevier Science
Year: 2007
Tongue: English
Weight: 296 KB
Volume: 38
Category: Article
ISSN: 0026-2692
DOI: 10.1016/j.mejo.2007.03.018

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