✦ LIBER ✦
Overview on ESD protection design for mixed-voltage I/O interfaces with high-voltage-tolerant power-rail ESD clamp circuits in low-voltage thin-oxide CMOS technology
✍ Scribed by Ming-Dou Ker; Wei-Jen Chang
- Publisher
- Elsevier Science
- Year
- 2007
- Tongue
- English
- Weight
- 729 KB
- Volume
- 47
- Category
- Article
- ISSN
- 0026-2714
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