✦ LIBER ✦
A low-power design method for FPGA using extra flip-flops driven by phase-shifted clock
✍ Scribed by Toshihiro Katashita; Atsushi Maeda; Yoshinori Yamaguchi
- Publisher
- John Wiley and Sons
- Year
- 2007
- Tongue
- English
- Weight
- 749 KB
- Volume
- 90
- Category
- Article
- ISSN
- 8756-663X
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