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๐Ÿ“

On Optimal Interconnections for VLSI

โœ Scribed by Andrew B. Kahng, Gabriel Robins (auth.)


Publisher
Springer US
Year
1995
Tongue
English
Leaves
301
Series
The Springer International Series in Engineering and Computer Science 301
Edition
1
Category
Library

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โœฆ Synopsis


On Optimal Interconnections for VLSI describes, from a geometric perspective, algorithms for high-performance, high-density interconnections during the global and detailed routing phases of circuit layout. First, the book addresses area minimization, with a focus on near-optimal approximation algorithms for minimum-cost Steiner routing. In addition to practical implementations of recent methods, the implications of recent results on spanning tree degree bounds and the method of Zelikovsky are discussed. Second, the book addresses delay minimization, starting with a discussion of accurate, yet algorithmically tractable, delay models. Recent minimum-delay constructions are highlighted, including provably good cost-radius tradeoffs, critical-sink routing algorithms, Elmore delay-optimal routing, graph Steiner arborescences, non-tree routing, and wiresizing. Third, the book addresses skew minimization for clock routing and prescribed-delay routing formulations. The discussion starts with early matching-based constructions and goes on to treat zero-skew routing with provably minimum wirelength, as well as planar clock routing. Finally, the book concludes with a discussion of multiple (competing) objectives, i.e., how to optimize area, delay, skew, and other objectives simultaneously. These techniques are useful when the routing instance has heterogeneous resources or is highly congested, as in FPGA routing, multi-chip packaging, and very dense layouts.
Throughout the book, the emphasis is on practical algorithms and a complete self-contained development. On Optimal Interconnections forVLSI will be of use to both circuit designers (CAD tool users) as well as researchers and developers in the area of performance-driven physical design.

โœฆ Table of Contents


Front Matter....Pages i-xvii
Preliminaries....Pages 1-15
Area....Pages 16-63
Delay....Pages 64-139
Skew....Pages 140-196
Multiple Objectives....Pages 197-238
Back Matter....Pages 239-286

โœฆ Subjects


Circuits and Systems; Electrical Engineering; Computer-Aided Engineering (CAD, CAE) and Design


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