✦ LIBER ✦

Latch-Up Elimination in Bulk CMOS LSI Circuits

✍ Scribed by Schroeder, J. E.; Ochoa, A.; Dressendorfer, P. V.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Modeling Latch-Up in CMOS Integrated Cir

✍ Estreich, D.B.; Dutton, R.W. 📂 Article 📅 1982 🏛 IEEE 🌐 English ⚖ 1007 KB

Study of latch-up immunization in bulk C

✍ RuiBin Li, Wei Chen, DongSheng Lin, ShanChao Yang, XiaoYan Bai, GuiZhen Wang, Ya 📂 Article 📅 2012 🏛 SP Science China Press 🌐 English ⚖ 706 KB

IIIB-5 current characterization of SCR l

✍ Dishaw, J.P.; Kokkonen, K.; Matthews, A.; Henning, A. 📂 Article 📅 1983 🏛 IEEE 🌐 English ⚖ 199 KB

Imaging Latch-up Sites in CMOS Integrate

✍ Weichold, M.; Parker, D.; Fenech, J.-F. 📂 Article 📅 1985 🏛 IEEE 🌐 English ⚖ 521 KB

The influence of an LIGBT on CMOS latch

✍ Huang, A.Q.; Amaratunga, G.A.J. 📂 Article 📅 1995 🏛 IEEE 🌐 English ⚖ 209 KB

Static CMOS latch-up considerations in H

✍ Huang, Q.; Amaratunga, G.A.J.; Narayanan, E.M.S.; Milne, W.I. 📂 Article 📅 1990 🏛 IEEE 🌐 English ⚖ 388 KB