✦ LIBER ✦

Influence of sidewall spacer on threshold voltage of MOSFET with high-k gate dielectric

✍ Scribed by J.P. Xu; F. Ji; P.T. Lai; J.G. Guan

Book ID: 108210712
Publisher: Elsevier Science
Year: 2008
Tongue: English
Weight: 205 KB
Volume: 48
Category: Article
ISSN: 0026-2714
DOI: 10.1016/j.microrel.2007.03.001

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Compact modeling of the effects of paras

Compact modeling of the effects of parasitic internal fringe capacitance on the threshold voltage of high-k gate-dielectric nanoscale SOI MOSFETs

✍ Kumar, M.J.; Gupta, S.K.; Venkataraman, V. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 299 KB

Influences of structure around gate-edge

Influences of structure around gate-edge on high electric field strength in MISFETs with high-k gate dielectrics

✍ Ono, M.; Nishiyama, A. 📂 Article 📅 2004 🏛 IEEE 🌐 English ⚖ 237 KB

Performance analysis of long Ge channel

Performance analysis of long Ge channel double gate (DG) p MOSFETs with high-k gate dielectrics based on carrier concentration formulation

✍ Swagata Bhattacherjee; Abhijit Biswas 📂 Article 📅 2011 🏛 Elsevier Science 🌐 English ⚖ 695 KB

Effect of Capacitance-Voltage Sweep on t

Effect of Capacitance-Voltage Sweep on the Flat-Band Voltage of Metal-Oxide-Semiconductor Device with High- k Gate Dielectric

✍ Yang, Hyundoek; Son, Yunik; Choi, Hyejung; Choi, Sangmoo; Hwang, Hyunsang 📂 Article 📅 2005 🏛 Institute of Pure and Applied Physics 🌐 English ⚖ 113 KB

Influence of high substrate doping level

Influence of high substrate doping levels on the threshold voltage and the mobility of deep-submicrometer MOSFETs

✍ van Dort, M.J.; Woerlee, P.H.; Walker, A.J.; Juffermans, C.A.H.; Lifka, H. 📂 Article 📅 1992 🏛 IEEE 🌐 English ⚖ 728 KB

Accurate modeling of the influence of ba

Accurate modeling of the influence of back gate bias and interface roughness on the threshold voltage of nanoscale DG MOSFETs

✍ Biswas, Abhijit; Bhattacherjee, Swagata 📂 Article 📅 2013 🏛 Elsevier Science 🌐 English ⚖ 625 KB