𝔖 Bobbio Scriptorium

✦ LIBER ✦

[IEEE Proceedings. 2006 International Conference on Design and Test of Integrated Systems in Nanoscale Technology - Tunis (2006.09.5-2006.09.7)] International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - CNTFET-based logic circuit design

✍ Scribed by O'Connor, I.; Liu, J.; Gaffiot, F.

Book ID: 120266780
Publisher: IEEE
Year: 2006
Tongue: English
Weight: 291 KB
Category: Article
ISBN-13: 9780780397262
DOI: 10.1109/DTIS.2006.1708734

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

[IEEE Proceedings. 2006 International Co

[IEEE Proceedings. 2006 International Conference on Design and Test of Integrated Systems in Nanoscale Technology - Tunis (2006.09.5-2006.09.7)] International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - CNTFET basics and simulation

✍ Dang, T.; Anghel, L.; Leveugle, R. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 333 KB

[IEEE Proceedings. 2006 International Co

[IEEE Proceedings. 2006 International Conference on Design and Test of Integrated Systems in Nanoscale Technology - Tunis (2006.09.5-2006.09.7)] International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - Analysis of CNTFET physical compact model

✍ Maneux, C.; Goguet, J.; Fregonese, S.; Zimmer, T.; Cazin d'Honincthun, H.; Galdi 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 444 KB

[IEEE International Conference on Design

[IEEE International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - Tunis, Tunisia (2006.09.5-2006.09.7)] International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - Folded cascode OTA design for wide band applications

✍ Daoud, H.; Ben Salem, S.; Zouari, S.; Loulou, M. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 235 KB

[IEEE International Conference on Design

[IEEE International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - Tunis, Tunisia (2006.09.5-2006.09.7)] International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - Low power digital design using modified GDI method

✍ Balasubramanian, P.; Joh, J. 📂 Article 📅 2006 🏛 IEEE ⚖ 393 KB

[IEEE International Conference on Design

[IEEE International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - Tunis, Tunisia (2006.09.5-2006.09.7)] International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - Design of secure digital communication systems using DCSK chaotic modulation

✍ Ben Farah, M.A.; Kachouri, A.; Samet, M. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 272 KB

[IEEE International Conference on Design

[IEEE International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - Tunis, Tunisia (2006.09.5-2006.09.7)] International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. - Supply voltage glitches effects on CMOS circuits

✍ Djellid-Ouar, A.; Cathebras, G.; Bancel, F. 📂 Article 📅 2006 🏛 IEEE ⚖ 465 KB