𝔖 Bobbio Scriptorium

✦ LIBER ✦

[IEEE Comput. Soc 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Paris, France (20-22 Oct. 1997)] 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Analysis of defect to yield correlation on memories: method, algorithms and limits

✍ Scribed by Bichebois, P.; Mathery, P.

Book ID: 126635358
Publisher: IEEE Comput. Soc
Year: 1997
Weight: 568 KB
Category: Article
ISBN-13: 9780818681684
DOI: 10.1109/DFTVS.1997.628308

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

[IEEE Comput. Soc 1997 IEEE Internationa

[IEEE Comput. Soc 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Paris, France (20-22 Oct. 1997)] 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Multiple fault detection in logic resources of FPGAs

✍ Wei Liang Huang, ; Meyer, F.J.; Lombardi, F. 📂 Article 📅 1997 🏛 IEEE Comput. Soc ⚖ 523 KB

[IEEE Comput. Soc 1997 IEEE Internationa

[IEEE Comput. Soc 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Paris, France (20-22 Oct. 1997)] 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Fast and area-time efficient Berger code checkers

✍ Yu-Yau Guo, ; Jien-Chung Lo, ; Metra, C. 📂 Article 📅 1997 🏛 IEEE Comput. Soc ⚖ 583 KB

[IEEE Comput. Soc 1997 IEEE Internationa

[IEEE Comput. Soc 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Paris, France (20-22 Oct. 1997)] 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Crosstalk minimization in three-layer HVH channel routing

✍ Zhan Chen, ; Koren, I. 📂 Article 📅 1997 🏛 IEEE Comput. Soc ⚖ 309 KB

[IEEE Comput. Soc 1997 IEEE Internationa

[IEEE Comput. Soc 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Paris, France (20-22 Oct. 1997)] 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Fast error-correcting Newton-Raphson dividers using time shared TMR

✍ Gallagher, W.L.; Swartzlander, E.E. 📂 Article 📅 1997 🏛 IEEE Comput. Soc ⚖ 513 KB

[IEEE Comput. Soc IEEE International Sym

[IEEE Comput. Soc IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Yamanashi, Japan (25-27 Oct. 2000)] Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Path delay fault testability analysis

✍ Sosnowski, J.; Wabia, T.; Bech, T. 📂 Article 📅 2000 🏛 IEEE Comput. Soc ⚖ 657 KB

[IEEE Comput. Soc IEEE International Sym

[IEEE Comput. Soc IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Yamanashi, Japan (25-27 Oct. 2000)] Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - The effect of placement on yield for standard cell designs

✍ Prasad, R.K.; Koren, I. 📂 Article 📅 2000 🏛 IEEE Comput. Soc 🌐 English ⚖ 382 KB