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[IEEE Comput. Soc 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. DFT 2002 - Vancouver, BC, Canada (6-8 Nov. 2002)] 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2002. DFT 2002. Proceedings. - Testing digital circuits with constraints

✍ Scribed by Al-Yamani, A.A.; Mitra, S.; McCluskey, E.J.

Book ID: 126762496
Publisher: IEEE Comput. Soc
Year: 2002
Weight: 364 KB
Category: Article
ISBN-13: 9780769518312
DOI: 10.1109/DFTVS.2002.1173516

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