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[IEEE 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Huntington Beach, CA, USA (2012.11.9-2012.11.10)] 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Automatic generation of Verilog bus transactors from natural language protocol specifications

✍ Scribed by Harris, Ian G.

Book ID: 121079159
Publisher: IEEE
Year: 2012
Weight: 469 KB
Category: Article
ISBN: 1467328987
DOI: 10.1109/HLDVT.2012.6418240

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