𝔖 Bobbio Scriptorium

✦ LIBER ✦

[IEEE 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Huntington Beach, CA, USA (2012.11.9-2012.11.10)] 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Emulation in post-silicon validation: It's not just for functionality anymore

✍ Scribed by Balston, Kyle; Hu, Alan J.; Wilton, Steven J. E.; Nahir, Amir

Book ID: 120656742
Publisher: IEEE
Year: 2012
Weight: 959 KB
Category: Article
ISBN: 1467328987
DOI: 10.1109/HLDVT.2012.6418252

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

[IEEE 2012 IEEE International High Level

[IEEE 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Huntington Beach, CA, USA (2012.11.9-2012.11.10)] 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT) - A functional test generation technique for RTL datapaths

✍ Alizadeh, Bijan; Fujita, Masahiro 📂 Article 📅 2012 🏛 IEEE ⚖ 544 KB

[IEEE 2012 IEEE International High Level

[IEEE 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Huntington Beach, CA, USA (2012.11.9-2012.11.10)] 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT) - A flexible modeling environment for a NoC-based multicore architecture

✍ Lemaire, Romain; Thuries, Sebastien; Heiztmann, Frederic 📂 Article 📅 2012 🏛 IEEE ⚖ 970 KB

[IEEE 2012 IEEE International High Level

[IEEE 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Huntington Beach, CA, USA (2012.11.9-2012.11.10)] 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Automatic generation of Verilog bus transactors from natural language protocol specifications

✍ Harris, Ian G. 📂 Article 📅 2012 🏛 IEEE ⚖ 469 KB

[IEEE 2011 IEEE International High Level

[IEEE 2011 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Napa Valley, CA, USA (2011.11.9-2011.11.11)] 2011 IEEE International High Level Design Validation and Test Workshop - Modular equivalence verification of polynomial datapaths with multiple word-length operands

✍ Alizadeh, Bijan; Fujita, Masahiro 📂 Article 📅 2011 🏛 IEEE ⚖ 553 KB

[IEEE 2011 IEEE International High Level

[IEEE 2011 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Napa Valley, CA, USA (2011.11.9-2011.11.11)] 2011 IEEE International High Level Design Validation and Test Workshop - Formal verification guided automatic design error diagnosis and correction of complex processors

✍ Gharehbaghi, Amir Masoud; Fujita, Masahiro 📂 Article 📅 2011 🏛 IEEE ⚖ 503 KB

[IEEE 2008 IEEE International High Level

[IEEE 2008 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Incline Village, NV, USA (2008.11.19-2008.11.21)] 2008 IEEE International High Level Design Validation and Test Workshop - The role of parallel simulation in functional verification

✍ Guglielmo, Giuseppe Di; Fummi, Franco; Hampton, Mark; Pravadelli, Graziano; Stef 📂 Article 📅 2008 🏛 IEEE ⚖ 365 KB