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[IEEE 2009 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2009.04.28-2009.04.30)] 2009 International Symposium on VLSI Design, Automation and Test - A 6-bit 220-MS/s time-interleaving SAR ADC in 0.18-µm digital CMOS process

✍ Scribed by Chun-Cheng Liu, ; Yi-Ting Huang, ; Guan-Ying Huang, ; Soon-Jyh Chang, ; Chung-Ming Huang, ; Chih-Haur Huang,

Book ID: 121863483
Publisher: IEEE
Year: 2009
Tongue: English
Weight: 457 KB
Category: Article
ISBN: 1424427819
DOI: 10.1109/VDAT.2009.5158133

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