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[IEEE 2009 10th Latin American Test Workshop - Rio de Janeiro, Brazil (2009.03.2-2009.03.5)] 2009 10th Latin American Test Workshop - NBTI-aware technique for transistor sizing of high-performance CMOS gates

✍ Scribed by da Silva, Mauricio B.; Camargo, Vinicius V. A.; Brusamarello, Lucas; Wirth, Gilson I.; da Silva, Roberto

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